Sökning: "built-in self-test architecture"
Hittade 5 avhandlingar innehållade orden built-in self-test architecture.
1. High-Level Test Generation and Built-In Self-Test Techniques for Digital Systems
Sammanfattning : The technological development is enabling production of increasingly complex electronic systems. All those systems must be verified and tested to guarantee correct behavior. As the complexity grows, testing is becoming one of the most significant factors that contribute to the final product cost. LÄS MER
2. An Embedded Test Processor Architecture for Board- and Chip System Built-In Self Test : TRITA-MMK 2003:27ISRN KTH/MMK/R--03/27-SE
Sammanfattning : .... LÄS MER
3. Test Cost Reduction of 3D Stacked ICs : Test Planning and Test Flow Selection
Sammanfattning : Ever higher levels of integration within the Integrated Circuit (IC) tomeet progressively widening scope of its application in respect of functionality,size, performance and manufacturing issues inspired developmentof the three-dimensional (3D) Stacked IC as a device havingviable architecture. However, with increased complexity, manufacturingcost increased. LÄS MER
4. System-on-Chip test scheduling with defect-probability and temperature considerations
Sammanfattning : Electronic systems have become highly complex, which results in a dramatic increase of both design and production cost. Recently a core-based system-on-chip (SoC) design methodology has been employed in order to reduce these costs. LÄS MER
5. Stimuli Generation Techniques for On-Chip Mixed-Signal Test
Sammanfattning : With increased complexity of the contemporary very large integrated circuits the need for onchip test addressing not only the digital but also analog and mixed-signal RF blocks has emerged. The standard production test has become more costly and the instrumentation is pushed to its limits by the leading edge integrated circuit technologies. LÄS MER
