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1. 1. Accurate Leakage-Conscious Architecture-Level Power Estimation for SRAM-based Memory Structures

   Författare :Minh Quang Do; Chalmers tekniska högskola; []
   Nyckelord :TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; SRAM Power Modeling; Deep Submicron; Power-Performance Estimation Tool; VLSI; Power Estimation; DSP Architecture; CMOS; Cache Power Modeling;

   Sammanfattning : Following Moore’s Law, technology scaling will continue providing integration capacityof billions of transistors for IC industry. As transistors keep shrinking in size, leakagepower dissipation dramatically increases and gradually becomes a first-class design constraint. LÄS MER