Sökning: "Multiprocessor computer"

Visar resultat 6 - 10 av 56 avhandlingar innehållade orden Multiprocessor computer.

  1. 6. Scheduling Algorithms For Fault-Tolerant Real-Time Systems

    Författare :Risat Pathan; Chalmers tekniska högskola; []
    Nyckelord :NATURVETENSKAP; NATURAL SCIENCES; NATURVETENSKAP; NATURAL SCIENCES; Online Scheduling; Partitioned Scheduling; Rate-Monotonic Scheduling; Multiprocessors; Uniprocessor; Task-Splitting Algorithms; Periodic Task Scheduling; Real-Time Systems; Fault-Tolerant Scheduling;

    Sammanfattning : This thesis deals with the problem of designing efficient fault-tolerant real-time scheduling algorithms for independent periodic tasks on uni- and multiprocessor platforms. The well-known Rate-Monotonic (RM) scheduling algorithm is assumed as it is widely used in many commercial systems due to its simplicity and ease of implementation. LÄS MER

  3. 7. Schemes to Improve the Efficiency of Hardware Transactional Memory Systems

    Författare :Mridha Mohammad Waliullah; Chalmers tekniska högskola; []
    Nyckelord :NATURVETENSKAP; NATURAL SCIENCES; transactional memory; parallel programming; chip-multiprocessor; multiprocessor;

    Sammanfattning : In todays ubiquitous multiprocessor environment parallel programming becomesan important tool to reap the maximum gain. But the traditional lock-based parallelprogramming model is not attracting average programmers as the level of expertiseneeded is very high. LÄS MER

  4. 8. DDRNoC: Dual Data-Rate Network-on-Chip

    Författare :Ahsen Ejaz; Chalmers tekniska högskola; []
    Nyckelord :NATURVETENSKAP; NATURAL SCIENCES; TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; Network-on-Chip; On-Chip Interconnect; Dual Data-Rate; Multiprocessor System-on-Chip; Chip Multiprocessors; System-on-Chip;

    Sammanfattning : Networks-on-Chip (NoCs) are becoming increasing important for the performance of modern multi-core system-on-chip. For various on-chip networks with virtual channel (VC) ow control, the slow control logic (VC and switch allocation logic) of the NoC routers limits the NoC clock period while their datapath (switch and link) possesses signifcant slack. LÄS MER

  5. 9. Dual Data Rate Network-on-Chip Architectures

    Författare :Ahsen Ejaz; Chalmers tekniska högskola; []
    Nyckelord :NATURVETENSKAP; NATURAL SCIENCES; TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; Dual Data-Rate; Network-on-Chip; System-on-Chip; On-Chip Interconnect; Chip Multiprocessors; Multiprocessor System-on-Chip;

    Sammanfattning : Networks-on-Chip (NoCs) are becoming increasing important for the performance of modern multi-core systems-on-chip. The performance of current NoCs is limited, among others, by two factors: their limited clock frequency and long router pipeline. The clock frequency of a network defines the limits of its saturation throughput. LÄS MER

  7. 10. Methods for Creating and Exploiting Data Locality

    Författare :Dan Wallin; Erik Hagersten; Sverker Holmgren; David Wood; Uppsala universitet; []
    Nyckelord :NATURVETENSKAP; NATURAL SCIENCES; data locality; temporal locality; spatial locality; prefetching; cache; cache behavior; cache coherence; snooping protocols; partial differential equation; shared-memory multiprocessor; chip multiprocessor; simulation; Computer engineering; Datorteknik;

    Sammanfattning : The gap between processor speed and memory latency has led to the use of caches in the memory systems of modern computers. Programs must use the caches efficiently and exploit data locality for maximum performance. LÄS MER