Sökning: "Network-on-Chip"

Visar resultat 6 - 10 av 31 avhandlingar innehållade ordet Network-on-Chip.

1. 6. Design and Analysis of On-Chip Communication for Network-on-Chip Platforms

   Författare :Zhonghai Lu; Axel Jantsch; Kees Goossens; KTH; []
   Nyckelord :TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; On-Chip Communication; Network-on-Chip; System-on-Chip; Electronics; Elektronik;

   Sammanfattning : Due to the interplay between increasing chip capacity and complex applications, System-on-Chip (SoC) development is confronted by severe challenges, such as managing deep submicron effects, scaling communication architectures and bridging the productivity gap. Network-on-Chip (NoC) has been a rapidly developed concept in recent years to tackle the crisis with focus on network-based communication. LÄS MER

3. 7. Exploring trade-offs between Latency and Throughput in the Nostrum Network on Chip

   Författare :Erland Nilsson; Johnny Öberg; Daniel Wiklund; KTH; []
   Nyckelord :TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; Micro electronics; Nostrum; Network on Chip; NoC; on-chip networks; micro networks; Nätverk på kisel; Nätverk på chip; Other electrical engineering; electronics and photonics; Övrig elektroteknik; elektronik och fotonik;

   Sammanfattning : During the past years has the Nostrum Network on Chip (NoC) been developed to become a competitive platform for network based on-chip communication. The Nostrum NoC provides a versatile communication platform to connect a large number of intellectual properties (IP) on a single chip. LÄS MER

4. 8. Performance and Energy Efficient Building Blocks for Network-on-Chip Architectures

   Författare :Sriram R. Vangal; Atila Alvandpour; Viktor Öwall; Linköpings universitet; []
   Nyckelord :NATURVETENSKAP; NATURAL SCIENCES; Network-on-Chip Architectures; floating-point units; tiled-architectures; crossbar routers; multi-processor interconnection; Computer engineering; Datorteknik;

   Sammanfattning : The ever shrinking size of the MOS transistors brings the promise of scalable Network-on-Chip (NoC) architectures containing hundreds of processing elements with on-chip communication, all integrated into a single die. Such a computational fabric will provide high levels of performance in an energy efficient manner. LÄS MER

5. 9. Mapping Concurrent Applications to Multiprocessor Systems with Multithreaded Processors and Network on Chip-Based Interconnections

   Författare :Ruxandra Pop; Petru Eles; Shashi Kumar; Linköpings universitet; []
   Nyckelord :Network on Chip; Multiprocessor Embedded Systems; Task Mapping; Task Scheduling; Multithreading; Simultaneous Multithreading; Response Time Estimation; Genetic Algorithms; List Scheduling; Soft Deadline; Task Graphs; TECHNOLOGY; TEKNIKVETENSKAP;

   Sammanfattning : Network on Chip (NoC) architectures provide scalable platforms for designing Systems on Chip (SoC) with large number of cores. Developing products and applications using an NoC architecture offers many challenges and opportunities. A tool which can map an application or a set of applications to a given NoC architecture will be essential. LÄS MER

7. 10. Architecture Support and Scalability Analysis of Memory Consistency Models in Network-on-Chip based Systems

   Författare :Abdul Naeem; Axel Jantsch; Zhonghai Lu; Jari Nurmi; KTH; []
   Nyckelord :TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; Memory consistency; Protected release consistency; Distributed shared memory; Network-on-Chip; Scalability;

   Sammanfattning : The shared memory systems should support parallelization at the computation (multi-core), communication (Network-on-Chip, NoC) and memory architecture levels to exploit the potential performance benefits. These parallel systems supporting shared memory abstraction both in the general purpose and application specific domains are confronting the critical issue of memory consistency. LÄS MER