Sökning: "sidewall transfer lithography"

Hittade 5 avhandlingar innehållade orden sidewall transfer lithography.

  1. 1. Silicon nanowire based devices for More than Moore Applications

    Författare :Ganesh Jayakumar; Per-Erik Hellström; Mikael Östling; Luca Selmi; KTH; []
    Nyckelord :silicon nanowire; biosensor; CMOS; sequential integration; lab-on-chip; LOC; high-K; high-K integration on SiNW biosensor; ALD; fluid gate; back gate; SiNW; SiNW pixel matrix; FEOL; pattern transfer lithography; sidewall transfer lithography; STL; multi-target bio detection; BEOL; nanonets; silicon nanonets; SiNN-FET; SiNW-FET; CMOS integration of nanowires; CMOS integration of nanonets; monolithic 3D integration of nanowires; above-IC integration of nanowires; DNA detection using SiNW; SiNW biosensor; dry environment DNA detection; DNA hybridization detection using SiNW; SiNW functionalization; SiNW silanization; SiNW grafting; FEOL integration of SiNW; BEOL integration of SiNW; sequential multiplexed biodetection; biodetection efficiency of SiNW; front end of line integration of SiNW; back end of line integration of SiNW; SiNW dry environment functionalization; APTES cross-linker; accessing SiNW test site; fluorescence microscopy of SiNW; geometry of SiNW; SiNW biosensor variability; top-down fabrication of SiNW; bottom-up fabrication of SiNW; VLS method; ams foundry CMOS process; adding functionality in BEOL process; sensor integration in BEOL process; hafnium oxide; HfO2; aluminium oxide; Al2O3; TiN backgate; Nickel source drain; ISFET; ion sensitive field effect transistor; Overcoming Nernst limit of detection using SiNW; SiNW sub-threshold region operation; ASIC; SOC; SiGe selective epitaxy; epitaxial growth of SiNW; epitaxial growth of nanowires; epitaxial growth of nanonets; nickel silicide contacts; salicide process; high yield SiNW fabrication; high volume SiNW fabrication; silicon ribbon; SiRi pixel; SiRi biosensor; SiRi DNA detection; monolithic 3D integration of nanonets; above-IC integration of nanonets; impact of back gate voltage on silicon nanowire; impact of back gate voltage on SiNW; FDSOI; fully depleted silicon on insulator technology; metal backgate; wafer scale integration of SiNW; wafer scale integration of nanonets; impact of backgate voltage on CMOS inverter circuit; frequency divider; D flip-flop; Informations- och kommunikationsteknik; Information and Communication Technology;

    Sammanfattning : Silicon nanowires (SiNW) are in the spotlight for a few years in the research community as a good candidate for biosensing applications. This is attributed to their small dimensions in nanometer scale that offers high sensitivity, label-free detection and at the same time utilizing small amount of sample. LÄS MER

  2. 2. Integration of silicide nanowires as Schottky barrier source/drain in FinFETs

    Författare :Zhen Zhang; Shi-Li Zhang; Tsu-Jae King Liu; KTH; []
    Nyckelord :ENGINEERING AND TECHNOLOGY; TEKNIK OCH TEKNOLOGIER; TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; CMOS technology; MOSFET; FinFET; Schottky diode; Schottky barrier soure drain; silicide; SALICIDE; SOI; multiple-gate; nanowire; sidewall transfer lithography; Electronics; Elektronik;

    Sammanfattning : The steady and aggressive downscaling of the physical dimensions of the conventional metal-oxide-semiconductor field-effect-transistor (MOSFET) has been the main driving force for the IC industry and information technology over the past decades. As the device dimensions approach the fundamental limits, novel double/trigate device architecture such as FinFET is needed to guarantee the ultimate downscaling. LÄS MER

  3. 3. Fabrication, characterization, and modeling of metallic source/drain MOSFETs

    Författare :Valur Gudmundsson; Per-Erik Hellström; Yee-Chia Yeo; KTH; []
    Nyckelord :ENGINEERING AND TECHNOLOGY; TEKNIK OCH TEKNOLOGIER; TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; Metallic source drain; contact resistivity; Monte Carlo; NiSi; PtSi; SOI; UTB; tri-gate; FinFET; multiple-gate; nanowire; MOSFET; CMOS; Schottky barrier; silicide; SALICIDE;

    Sammanfattning : As scaling of CMOS technology continues, the control of parasitic source/drain (S/D) resistance (RSD) is becoming increasingly challenging. In order to control RSD, metallic source/drain MOSFETs have attracted significant attention, due to their low resistivity, abrupt junction and low temperature processing (≤700 °C). LÄS MER

  4. 4. Growth, processing and characterization of group IV materials for thermoelectric applications

    Författare :Mohammad Noroozi; Muhammet .S Toprak; Henry .H Radamson; Raşit Turan; KTH; []
    Nyckelord :ENGINEERING AND TECHNOLOGY; TEKNIK OCH TEKNOLOGIER; NATURAL SCIENCES; NATURVETENSKAP; NATURVETENSKAP; NATURAL SCIENCES; Thermoelectric; SiGe; GeSn Si ; Chemical vapor deposition; Nanowires; Physics; Fysik;

    Sammanfattning : Discover of new energy sources and solutions are one of the important global issues nowadays, which has a big impact on economy as well as environment. One of the methods to help to mitigate this issue is to recover wasted heat, which is produced in large quantities by the industry, through vehicle exhausts and in many other situations where we consume energy. LÄS MER

  5. 5. Integration of metallic source/drain contacts in MOSFET technology

    Författare :Jun Luo; Mikael Östling; Shi-Li Zhang; Anthony O'Neill; KTH; []
    Nyckelord :NATURAL SCIENCES; NATURVETENSKAP; NATURVETENSKAP; NATURAL SCIENCES; CMOS technology; MOSFET; Schottky barrier MOSFET; metallic source drain; contact resistivity; NiSi; PtSi; SALICIDE; ultrathin silicide; FinFET; Semiconductor physics; Halvledarfysik;

    Sammanfattning : The continuous and aggressive downscaling of conventional CMOS devices has been driving the vast growth of ICs over the last few decades. As the CMOS downscaling approaches the fundamental limits, novel device architectures such as metallic source/drain Schottky barrier MOSFET (SB-MOSFET) and SB-FinFET are probably needed to further push the ultimate downscaling. LÄS MER