Sökning: "memory systems"

Visar resultat 16 - 20 av 641 avhandlingar innehållade orden memory systems.

1. 16. Runtime Management of Multiprocessor Systems for Fault Tolerance, Energy Efficiency and Load Balancing

   Författare :Stavros Tzilis; Chalmers tekniska högskola; []
   Nyckelord :NATURVETENSKAP; NATURAL SCIENCES; TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; Fault Tolerance; Algorithms; Runtime Management; Multiprocessors; Performance; Adaptive Systems; Load Balancing; Energy Efficiency;

   Sammanfattning : Efficiency of modern multiprocessor systems is hurt by unpredictable events: aging causes permanent faults that disable components; application spawnings and terminations taking place at arbitrary times, affect energy proportionality, causing energy waste; load imbalances reduce resource utilization, penalizing performance. This thesis demonstrates how runtime management can mitigate the negative effects of unpredictable events, making decisions guided by a combination of static information known in advance and parameters that only become known at runtime. LÄS MER

3. 17. Automatic memory management for flexible real-time systems

   Författare :Sven Robertz; Institutionen för datavetenskap; []
   Nyckelord :NATURVETENSKAP; NATURAL SCIENCES; Computer science; feedback scheduling; embedded systems; real-time; memory management; garbage collection; numerical analysis; systems; control; Datalogi; numerisk analys; system; kontroll;

   Sammanfattning : In a flexible real-time system, the constraints in available CPU time and memory lead to resource management problems, which must be handled carefully in order to maximize quality of service while avoiding overload. Managing CPU time -- scheduling -- is well studied and dynamic scheduling is widely accepted in the real-time industry. LÄS MER

4. 18. Hierarchical scheduling for predictable execution of real-time software components and legacy systems

   Författare :Rafia Inam; Mikael Sjödin; Jukka Mäki-Turja; Moris Behnam; Giuseppe Lipari; Mälardalens högskola; []
   Nyckelord :TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; real-time systems; component integration and reuse; hierarchical scheduling; multicore; Computer Science; datavetenskap;

   Sammanfattning : This dissertation presents techniques to achieve predictable execution of coarse-grained software components and for preservation of temporal properties of components during their integration and reuse.The dissertation presents a novel concept runnable virtual node (RVN) which interaction with the environment is bounded both by a functional and a temporal interface, and the validity of its internal temporal behaviour is preserved when integrated with other components or when reused in a new environment. LÄS MER

5. 19. Techniques for Enhancing the Efficiency of Transactional Memory Systems

   Författare :Shady Issa; Paolo Romano; Vladimir Vlassov; Mats Brorsson; Konstantin Busch; KTH; []
   Nyckelord :TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; Transactional Memory; Parallel Programming; Concurrency Control; Self-tuning; Energy Efficiency; Data Partitioning; Dynamic Frequency and Voltage Scaling DVFS ; Hardware Transactional Memory HTM ; Memória Transacional; Programação Paralela; Eficiência Energética; Mecanismos de Auto-configuração; Partição de Dados; Frequência Dinâmica e do Escalonamento de Voltagem DVFS ; Memória Transacional em Hardware HTM ; Transaktionellt Minne; Parallellprogrammering; Samtida Exekvering; Självjusterande; Energieffektivitet; Datapartitionering; Dynamisk Frekvens och Volttalsskalning; Informations- och kommunikationsteknik; Information and Communication Technology;

   Sammanfattning : Transactional Memory (TM) is an emerging programming paradigm that drastically simplifies the development of concurrent applications by relieving programmers from a major source of complexity: how to ensure correct, yet efficient, synchronization of concurrent accesses to shared memory. Despite the large body of research devoted to this area, existing TM systems still suffer from severe limitations that hamper both their performance and energy efficiency. LÄS MER

7. 20. A Slowdown Prediction Method to Improve Memory Aware Scheduling

   Författare :Andreas de Blanche; Stefan Christiernin; Thomas Lundqvist; Per Stenström; Nectarios Koziris; Högskolan Väst; []
   Nyckelord :TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; SAMHÄLLSVETENSKAP; SOCIAL SCIENCES; Multi-core processor; slowdown aware scheduling; memory bandwidth; resource contention; last level cache; co-scheduling; performance evaluation; Datateknik; Computer engineering;

   Sammanfattning : Scientific and technological advances in the area of integrated circuits have allowed the performance of microprocessors to grow exponentially since the late 1960's. However, the imbalance between processor and memory bus capacity has increased in recent years. LÄS MER