Sökning: "high-k"

Visar resultat 1 - 5 av 48 avhandlingar innehållade ordet high-k.

  1. 1. Vertical III-V/High-k Nanowire MOS Capacitors and Transistors

    Författare :Jun Wu; Institutionen för elektro- och informationsteknik; []
    Nyckelord :TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; Nanowire; MOSFET; MOS capacitor; C-V; XPS; MOVPE; InGaAs; InAs; High-k; RF; Track-and-hold circuit;

    Sammanfattning : The emerging nanowire technology in recent years has attracted an increasing interest for high-speed, low-power electronics due to the possibility of a gate-all-around (GAA) geometry enabling aggressive gate length scaling, together with the ease in incorporating high-mobility narrow band gap III-V semiconductors such as InAs on Si substrates. These benefits make vertical nanowire transistors an attractive alternative to the planar devices. LÄS MER

  2. 2. Electron states in high-k dielectric/silicon structures

    Författare :Bahman Raeissi; Chalmers University of Technology; []
    Nyckelord :MOS; electron states; High-k dielectrics;

    Sammanfattning : .... LÄS MER

  3. 3. Low-frequency noise in high-k gate stacks with interfacial layer engineering

    Författare :Maryam Olyaei; Bengt Gunnar Malm; Paolo Pavan; KTH; []
    Nyckelord :ENGINEERING AND TECHNOLOGY; TEKNIK OCH TEKNOLOGIER; TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; CMOS; high k; 1 f noise; low-frequency noise; number fluctuations; mobility fluctuat ions; traps; interfacial layer; TmSiO; Tm 2O3; Informations- och kommunikationsteknik; Information and Communication Technology;

    Sammanfattning : The rapid progress of complementary-metal-oxide-semiconductor (CMOS) integrated circuit technology became feasible through continuous device scaling. The implementation of high-k/metal gates had a significantcontribution to this progress during the last decade. However, there are still challenges regarding the reliability of these devices. LÄS MER

  4. 4. Integration of thulium silicate for enhanced scalability of high-k/metal gate CMOS technology

    Författare :Eugenio Dentoni Litta; Per-Erik Hellström; Mikael Östling; Lars-Åke Ragnarsson; KTH; []
    Nyckelord :ENGINEERING AND TECHNOLOGY; TEKNIK OCH TEKNOLOGIER; thulium; silicate; TmSiO; Tm2O3; interfacial layer; IL; CMOS; high-k; ALD; Informations- och kommunikationsteknik; Information and Communication Technology;

    Sammanfattning : High-k/metal gate stacks have been introduced in CMOS technology during the last decade in order to sustain continued device scaling and ever-improving circuit performance. Starting from the 45 nm technology node, the stringent requirements in terms of equivalent oxide thickness and gate current density have rendered the replacement of the conventional SiON/poly-Si stack unavoidable. LÄS MER

  5. 5. Silicon nanowire based devices for More than Moore Applications

    Författare :Ganesh Jayakumar; Per-Erik Hellström; Mikael Östling; Luca Selmi; KTH; []
    Nyckelord :silicon nanowire; biosensor; CMOS; sequential integration; lab-on-chip; LOC; high-K; high-K integration on SiNW biosensor; ALD; fluid gate; back gate; SiNW; SiNW pixel matrix; FEOL; pattern transfer lithography; sidewall transfer lithography; STL; multi-target bio detection; BEOL; nanonets; silicon nanonets; SiNN-FET; SiNW-FET; CMOS integration of nanowires; CMOS integration of nanonets; monolithic 3D integration of nanowires; above-IC integration of nanowires; DNA detection using SiNW; SiNW biosensor; dry environment DNA detection; DNA hybridization detection using SiNW; SiNW functionalization; SiNW silanization; SiNW grafting; FEOL integration of SiNW; BEOL integration of SiNW; sequential multiplexed biodetection; biodetection efficiency of SiNW; front end of line integration of SiNW; back end of line integration of SiNW; SiNW dry environment functionalization; APTES cross-linker; accessing SiNW test site; fluorescence microscopy of SiNW; geometry of SiNW; SiNW biosensor variability; top-down fabrication of SiNW; bottom-up fabrication of SiNW; VLS method; ams foundry CMOS process; adding functionality in BEOL process; sensor integration in BEOL process; hafnium oxide; HfO2; aluminium oxide; Al2O3; TiN backgate; Nickel source drain; ISFET; ion sensitive field effect transistor; Overcoming Nernst limit of detection using SiNW; SiNW sub-threshold region operation; ASIC; SOC; SiGe selective epitaxy; epitaxial growth of SiNW; epitaxial growth of nanowires; epitaxial growth of nanonets; nickel silicide contacts; salicide process; high yield SiNW fabrication; high volume SiNW fabrication; silicon ribbon; SiRi pixel; SiRi biosensor; SiRi DNA detection; monolithic 3D integration of nanonets; above-IC integration of nanonets; impact of back gate voltage on silicon nanowire; impact of back gate voltage on SiNW; FDSOI; fully depleted silicon on insulator technology; metal backgate; wafer scale integration of SiNW; wafer scale integration of nanonets; impact of backgate voltage on CMOS inverter circuit; frequency divider; D flip-flop; Informations- och kommunikationsteknik; Information and Communication Technology;

    Sammanfattning : Silicon nanowires (SiNW) are in the spotlight for a few years in the research community as a good candidate for biosensing applications. This is attributed to their small dimensions in nanometer scale that offers high sensitivity, label-free detection and at the same time utilizing small amount of sample. LÄS MER