Sökning: "cache coherence protocol"

Visar resultat 1 - 5 av 11 avhandlingar innehållade orden cache coherence protocol.

1. 1. Caches, Transactions and Memories : Models, Coherence and Consistency

   Författare :Yunyun Zhu; Parosh Abdulla; Mohamed Faouzi Atig; Ahmed Rezine; Bengt Jonsson; Riadh Robbana; Uppsala universitet; []
   Nyckelord :NATURVETENSKAP; NATURAL SCIENCES; cache coherence protocol; transactional memory; weak memory model; model checking; parameterized system; Computer Science; Datavetenskap;

   Sammanfattning : Computers have brought us inestimable convenience in recent years. We have become dependent on them and more sensitive to their performance. During the past decades, we have been trying to improve program efficiency. The invention of multi-core systems is regarded as the new era of boosting performance of computer programs. LÄS MER

3. 2. Advances Towards Data-Race-Free Cache Coherence Through Data Classification

   Författare :Mahdad Davari; Kaxiras Stefanos; Erik Hagersten; Alberto Ros; Manuel Eugenio Acacio Sánchez; Uppsala universitet; []
   Nyckelord :TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; Shared Memory Architectures; Multicore; Memory Hierarchy; Cache Coherence; Data Classification;

   Sammanfattning : Providing a consistent view of the shared memory based on precise and well-defined semantics—memory consistency model—has been an enabling factor in the widespread acceptance and commercial success of shared-memory architectures. Moreover, cache coherence protocols have been employed by the hardware to remove from the programmers the burden of dealing with the memory inconsistency that emerges in the presence of the private caches. LÄS MER

4. 3. Towards Runtime-Assisted Cache Management for Task-Parallel Programs

   Författare :Madhavan Manivannan; Chalmers tekniska högskola; []
   Nyckelord :NATURVETENSKAP; NATURAL SCIENCES; task parallelism; cache hierarchy; runtime system; dead blocks; multi-core architecture; sharing patterns;

   Sammanfattning : Architects have adopted the shared memory model that implicitly manages cache coherence and cache capacity in hardware, mainly to aid programmability of multi-core architectures. The hardware mechanisms are however prone to inefficiencies because they are not tailored to the behavior of individual parallel applications. LÄS MER

5. 4. Evaluation of design alternatives for a directory-based cache coherence protocol in shared-memory multiprocessors

   Författare :Håkan Grahn; Blekinge Tekniska Högskola; []
   Nyckelord :NATURVETENSKAP; NATURAL SCIENCES;

   Sammanfattning : In shared-memory multiprocessors, caches are attached to the processors in order to reduce the memory access latency. To keep the memory consistent, a cache coherence protocol is needed. LÄS MER

7. 5. High-Performance Network-on-Chip Design for Many-Core Processors

   Författare :Boqian Wang; Zhonghai Lu; Kun-Chih Chen; KTH; []
   Nyckelord :NATURVETENSKAP; NATURAL SCIENCES; TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; Network-on-Chip; Chip Multi Many-core Processors; Multiprocessor System-on-Chip; High-Performance Computing; Cache Coherence; Virtual Channel Reservation; Admission Control; Artificial Neural Network; AXI4; Quality of Service; Network-on-Chip; Chip Multi Many-core Processors; Multiprocessor Sys-tem on a Chip; High-Performance Computing; Cache Coherence; Virtual Channel Reser-vation; Admission Control; Artificial Neural Network; AXI4; Quality of Servic; Informations- och kommunikationsteknik; Information and Communication Technology;

   Sammanfattning : With the development of on-chip manufacturing technologies and the requirements of high-performance computing, the core count is growing quickly in Chip Multi/Many-core Processors (CMPs) and Multiprocessor System-on-Chip (MPSoC) to support larger scale parallel execution. Network-on-Chip (NoC) has become the de facto solution for CMPs and MPSoCs in addressing the communication challenge. LÄS MER