Sökning: "Stefanos Kaxiras"

Visar resultat 1 - 5 av 6 avhandlingar innehållade orden Stefanos Kaxiras.

  1. 1. Rethinking Dynamic Instruction Scheduling and Retirement for Efficient Microarchitectures

    Författare :Mehdi Alipour; David Black-Schaffer; Stefanos Kaxiras; Mikko H. Lipasti; Uppsala universitet; []
    Nyckelord :NATURAL SCIENCES; NATURVETENSKAP; NATURVETENSKAP; NATURAL SCIENCES; Out-of-Order Processors; Energy-Efficient; High-Performance; Instruction Scheduling; Computer Science; Datavetenskap;

    Sammanfattning : Out-of-order execution is one of the main micro-architectural techniques used to improve the performance of both single- and multi-threaded processors. The application of such a processor varies from mobile devices to server computers. LÄS MER

  2. 2. Leveraging Existing Microarchitectural Structures to Improve First-Level Caching Efficiency

    Författare :Ricardo Alves; David Black-Schaffer; Stefanos Kaxiras; Mattan Erez; Uppsala universitet; []
    Nyckelord :NATURAL SCIENCES; NATURVETENSKAP; NATURVETENSKAP; NATURAL SCIENCES; Energy Efficient Caching; Memory Architecture; Single Thread Performance; First-Level Caching; Out-of-Order Pipelines; Instruction Scheduling; Filter-Cache; Way-Prediction; Value-Prediction; Register-Sharing.;

    Sammanfattning : Low-latency data access is essential for performance. To achieve this, processors use fast first-level caches combined with out-of-order execution, to decrease and hide memory access latency respectively. LÄS MER

  3. 3. Advances Towards Data-Race-Free Cache Coherence Through Data Classification

    Författare :Mahdad Davari; Kaxiras Stefanos; Erik Hagersten; Alberto Ros; Manuel Eugenio Acacio Sánchez; Uppsala universitet; []
    Nyckelord :ENGINEERING AND TECHNOLOGY; TEKNIK OCH TEKNOLOGIER; TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; Shared Memory Architectures; Multicore; Memory Hierarchy; Cache Coherence; Data Classification;

    Sammanfattning : Providing a consistent view of the shared memory based on precise and well-defined semantics—memory consistency model—has been an enabling factor in the widespread acceptance and commercial success of shared-memory architectures. Moreover, cache coherence protocols have been employed by the hardware to remove from the programmers the burden of dealing with the memory inconsistency that emerges in the presence of the private caches. LÄS MER

  4. 4. Efficient Execution Paradigms for Parallel Heterogeneous Architectures

    Författare :Konstantinos Koukos; Stefanos Kaxiras; Margaret Martonosi; Uppsala universitet; []
    Nyckelord :ENGINEERING AND TECHNOLOGY; TEKNIK OCH TEKNOLOGIER; TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; Decoupled Execution; Performance; Energy; DVFS; Compiler Optimizations; Heterogeneous Coherence; Computer Science; Datavetenskap;

    Sammanfattning : This thesis proposes novel, efficient execution-paradigms for parallel heterogeneous architectures. The end of Dennard scaling is threatening the effectiveness of DVFS in future nodes; therefore, new execution paradigms are required to exploit the non-linear relationship between performance and energy efficiency of memory-bound application-regions. LÄS MER

  5. 5. Improving Energy-Efficiency of Multicores using First-Order Modeling

    Författare :Vasileios Spiliopoulos; Stefanos Kaxiras; Lieven Eeckhout; Uppsala universitet; []
    Nyckelord :NATURAL SCIENCES; NATURVETENSKAP; NATURVETENSKAP; NATURAL SCIENCES; Computer Architecture; DVFS; Cache Resizing; Interval modeling; Power modeling; Computer Science; Datavetenskap;

    Sammanfattning : In the recent decades, power consumption has evolved to one of the most critical resources in a computer system. In the form of electricity bill in data centers, battery life in mobile devices, or thermal constraints in desktops and laptops, power consumption imposes several limitations in today’s processors and improving power and energy efficiency is one of the most urgent research topics of Computer Architecture. LÄS MER