Sökning: "Per-Erik Hellström"

Visar resultat 1 - 5 av 7 avhandlingar innehållade orden Per-Erik Hellström.

  1. 1. Development of Process Technology for Photon Radiation Measurement Applications

    Författare :Henrik Andersson; Hans-Erik Nilsson; Göran Thungström; Per-Erik Hellström; Mittuniversitetet; []
    Nyckelord :ENGINEERING AND TECHNOLOGY; TEKNIK OCH TEKNOLOGIER; Electrical engineering; electronics and photonics; Elektroteknik; elektronik och fotonik;

    Sammanfattning : This thesis presents work related to new types of photo detectors and their applications. The focus has been on the development of process technology and methods by means of experimentation and measurements. LÄS MER

  2. 2. Sequential 3D Integration - Design Methodologies and Circuit Techniques

    Författare :Panagiotis Chaourani; Ana Rusu; Saul Rodriguez; Per-Erik Hellström; Georges Gielen; KTH; []
    Nyckelord :ENGINEERING AND TECHNOLOGY; TEKNIK OCH TEKNOLOGIER; TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; sequential 3D integration; monolithic inter-tier vias; design platforms; parasitic extraction flows; RF AMS circuits; inductors; heterogeneous integration; germanium transistors; Informations- och kommunikationsteknik; Information and Communication Technology;

    Sammanfattning : Sequential 3D (S3D) integration has been identified as a potential candidate for area efficient ICs. It entails the sequential processing of tiers of devices, one on top the other. LÄS MER

  3. 3. Integration of thulium silicate for enhanced scalability of high-k/metal gate CMOS technology

    Författare :Eugenio Dentoni Litta; Per-Erik Hellström; Mikael Östling; Lars-Åke Ragnarsson; KTH; []
    Nyckelord :ENGINEERING AND TECHNOLOGY; TEKNIK OCH TEKNOLOGIER; thulium; silicate; TmSiO; Tm2O3; interfacial layer; IL; CMOS; high-k; ALD; Informations- och kommunikationsteknik; Information and Communication Technology;

    Sammanfattning : High-k/metal gate stacks have been introduced in CMOS technology during the last decade in order to sustain continued device scaling and ever-improving circuit performance. Starting from the 45 nm technology node, the stringent requirements in terms of equivalent oxide thickness and gate current density have rendered the replacement of the conventional SiON/poly-Si stack unavoidable. LÄS MER

  4. 4. Applications of Si1-xGex alloys for Ge devices and monolithic 3D integration

    Författare :Konstantinos Garidis; Per-Erik Hellström; Mikael Östling; Sten Vollebregt; KTH; []
    Nyckelord :ENGINEERING AND TECHNOLOGY; TEKNIK OCH TEKNOLOGIER; TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; Silicon; germanium; epitaxy; selective; pn junction; germanium on insulator; GOI; Ge PFET; bonding; monolithic; sequential; three dimensional; 3D; low temperature; Informations- och kommunikationsteknik; Information and Communication Technology;

    Sammanfattning : As the semiconductor industry moves beyond the 10 nm node, power consumption constraints and reduction of the negative impact of parasitic elements become important. Silicon germanium (Si1−xGex) alloys have been used to amplify the performance of Si based devices and integrated circuits (ICs) for decades. LÄS MER

  5. 5. Fabrication, characterization, and modeling of metallic source/drain MOSFETs

    Författare :Valur Gudmundsson; Per-Erik Hellström; Yee-Chia Yeo; KTH; []
    Nyckelord :ENGINEERING AND TECHNOLOGY; TEKNIK OCH TEKNOLOGIER; TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; Metallic source drain; contact resistivity; Monte Carlo; NiSi; PtSi; SOI; UTB; tri-gate; FinFET; multiple-gate; nanowire; MOSFET; CMOS; Schottky barrier; silicide; SALICIDE;

    Sammanfattning : As scaling of CMOS technology continues, the control of parasitic source/drain (S/D) resistance (RSD) is becoming increasingly challenging. In order to control RSD, metallic source/drain MOSFETs have attracted significant attention, due to their low resistivity, abrupt junction and low temperature processing (≤700 °C). LÄS MER