Sökning: "Out-of-Order Processors"

Visar resultat 1 - 5 av 8 avhandlingar innehållade orden Out-of-Order Processors.

  1. 1. Rethinking Dynamic Instruction Scheduling and Retirement for Efficient Microarchitectures

    Författare :Mehdi Alipour; David Black-Schaffer; Stefanos Kaxiras; Mikko H. Lipasti; Uppsala universitet; []
    Nyckelord :NATURAL SCIENCES; NATURVETENSKAP; NATURVETENSKAP; NATURAL SCIENCES; Out-of-Order Processors; Energy-Efficient; High-Performance; Instruction Scheduling; Computer Science; Datavetenskap;

    Sammanfattning : Out-of-order execution is one of the main micro-architectural techniques used to improve the performance of both single- and multi-threaded processors. The application of such a processor varies from mobile devices to server computers. LÄS MER

  2. 2. Leveraging Existing Microarchitectural Structures to Improve First-Level Caching Efficiency

    Författare :Ricardo Alves; David Black-Schaffer; Stefanos Kaxiras; Mattan Erez; Uppsala universitet; []
    Nyckelord :NATURAL SCIENCES; NATURVETENSKAP; NATURVETENSKAP; NATURAL SCIENCES; Energy Efficient Caching; Memory Architecture; Single Thread Performance; First-Level Caching; Out-of-Order Pipelines; Instruction Scheduling; Filter-Cache; Way-Prediction; Value-Prediction; Register-Sharing.;

    Sammanfattning : Low-latency data access is essential for performance. To achieve this, processors use fast first-level caches combined with out-of-order execution, to decrease and hide memory access latency respectively. LÄS MER

  3. 3. High-Performance Network-on-Chip Design for Many-Core Processors

    Författare :Boqian Wang; Zhonghai Lu; Vassos Soteriou; KTH; []
    Nyckelord :NATURAL SCIENCES; NATURVETENSKAP; ENGINEERING AND TECHNOLOGY; TEKNIK OCH TEKNOLOGIER; NATURVETENSKAP; TEKNIK OCH TEKNOLOGIER; NATURAL SCIENCES; ENGINEERING AND TECHNOLOGY; Network-on-Chip; Chip Multi Many-core Processors; Multiprocessor System-on-Chip; High-Performance Computing; Cache Coherence; Virtual Channel Reservation; Admission Control; Artificial Neural Network; AXI4; Quality of Service; Network-on-Chip; Chip Multi Many-core Processors; Multiprocessor Sys-tem on a Chip; High-Performance Computing; Cache Coherence; Virtual Channel Reser-vation; Admission Control; Artificial Neural Network; AXI4; Quality of Servic; Informations- och kommunikationsteknik; Information and Communication Technology;

    Sammanfattning : With the development of on-chip manufacturing technologies and the requirements of high-performance computing, the core count is growing quickly in Chip Multi/Many-core Processors (CMPs) and Multiprocessor System-on-Chip (MPSoC) to support larger scale parallel execution. Network-on-Chip (NoC) has become the de facto solution for CMPs and MPSoCs in addressing the communication challenge. LÄS MER

  4. 4. Static instruction scheduling for high performance on energy-efficient processors

    Författare :Kim-Anh Tran; Alexandra Jimborean; Uppsala universitet; []
    Nyckelord :NATURAL SCIENCES; NATURVETENSKAP; NATURVETENSKAP; NATURAL SCIENCES; Computer Science; Datavetenskap;

    Sammanfattning : New trends such as the internet-of-things and smart homes push the demands for energy-efficiency. Choosing energy-efficient hardware, however, often comes as a trade-off to high-performance. LÄS MER

  5. 5. Finding and Exploiting Memory-Level-Parallelism in Constrained Speculative Architectures

    Författare :Kim-Anh Tran; Alexandra Jimborean; Stefanos Kaxiras; Louis-Noël Pouchet; Uppsala universitet; []
    Nyckelord :NATURAL SCIENCES; NATURVETENSKAP; NATURVETENSKAP; NATURAL SCIENCES; Memory-level-parallelism; Energy-efficiency; Performance; Compiler; Instruction Scheduling; SW HW Co-Design; Computer Science; Datavetenskap;

    Sammanfattning : One of the main performance bottlenecks of processors today is the discrepancy between processor and memory speed, known as the memory wall. While the processor executes instructions at a high pace, the memory is too slow to provide data in a timely manner. LÄS MER