Avancerad sökning
Hittade 3 avhandlingar som matchar ovanstående sökkriterier.
1. Leveraging Existing Microarchitectural Structures to Improve First-Level Caching Efficiency
Sammanfattning : Low-latency data access is essential for performance. To achieve this, processors use fast first-level caches combined with out-of-order execution, to decrease and hide memory access latency respectively. LÄS MER
2. Model Checking of Software Systems under Weak Memory Models
Sammanfattning : When a program is compiled and run on a modern architecture, different optimizations may be applied to gain in efficiency. In particular, the access operations (e.g., read and write) to the shared memory may be performed in an out-of-order manner, i. LÄS MER
3. Understanding Multicore Performance : Efficient Memory System Modeling and Simulation
Sammanfattning : To increase performance, modern processors employ complex techniques such as out-of-order pipelines and deep cache hierarchies. While the increasing complexity has paid off in performance, it has become harder to accurately predict the effects of hardware/software optimizations in such systems. LÄS MER