Sökning: "Memory-level-parallelism"

Visar resultat 1 - 5 av 6 avhandlingar innehållade ordet Memory-level-parallelism.

  1. 1. Finding and Exploiting Memory-Level-Parallelism in Constrained Speculative Architectures

    Författare :Kim-Anh Tran; Alexandra Jimborean; Stefanos Kaxiras; Louis-Noël Pouchet; Uppsala universitet; []
    Nyckelord :NATURVETENSKAP; NATURAL SCIENCES; Memory-level-parallelism; Energy-efficiency; Performance; Compiler; Instruction Scheduling; SW HW Co-Design; Computer Science; Datavetenskap;

    Sammanfattning : One of the main performance bottlenecks of processors today is the discrepancy between processor and memory speed, known as the memory wall. While the processor executes instructions at a high pace, the memory is too slow to provide data in a timely manner. LÄS MER

  2. 2. Techniques to Reduce Thread-Level Speculation Overhead

    Författare :Fredrik Warg; Chalmers tekniska högskola; []
    Nyckelord :NATURVETENSKAP; NATURAL SCIENCES; Computer architecture; multithreaded processors; performance evaluation; speculation overhead; thread-level speculation; chip multiprocessors;

    Sammanfattning : The traditional single-core processors are being replaced by chip multiprocessors (CMPs) where several processor cores are integrated on a single chip. While this is beneficial for multithreaded applications and multiprogrammed workloads, CMPs do not provide performance improvements for single-threaded applications. LÄS MER

  3. 3. Efficient Execution Paradigms for Parallel Heterogeneous Architectures

    Författare :Konstantinos Koukos; Stefanos Kaxiras; Margaret Martonosi; Uppsala universitet; []
    Nyckelord :TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; Decoupled Execution; Performance; Energy; DVFS; Compiler Optimizations; Heterogeneous Coherence; Computer Science; Datavetenskap;

    Sammanfattning : This thesis proposes novel, efficient execution-paradigms for parallel heterogeneous architectures. The end of Dennard scaling is threatening the effectiveness of DVFS in future nodes; therefore, new execution paradigms are required to exploit the non-linear relationship between performance and energy efficiency of memory-bound application-regions. LÄS MER

  4. 4. Dynamic Management of Multi-Core Processor Resources to Improve Energy Efficiency under Quality-of-Service Constraints

    Författare :Mehrzad Nejat; Chalmers tekniska högskola; []
    Nyckelord :TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; Cache Partitioning; Dynamic Voltage-Frequency Scaling DVFS ; Energy Efficiency; Re-configurable Core Architecture; Multi-core Resource Management; Quality-of-Service QoS ;

    Sammanfattning : With the current technology trends, the number of computers and computation demand is increasing dramatically. In addition to different economic and environmental costs at a large scale, the operational time of battery-powered devices is dependent on how efficiently the computer processors consume energy. LÄS MER

  5. 5. QoS Driven Coordinated Management of Resources to Save Energy in Multi-Core Systems

    Författare :Mehrzad Nejat; Chalmers tekniska högskola; []
    Nyckelord :NATURVETENSKAP; NATURAL SCIENCES; NATURVETENSKAP; NATURAL SCIENCES; TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; Re-configurable Core Architecture; Dynamic Voltage-Frequency Scaling DVFS ; Energy Efficiency; Quality-of-Service QoS ; Resource Management; Cache Partitioning;

    Sammanfattning : Reducing the energy consumption of computing systems is a necessary endeavor. However, saving energy should not come at the expense of degrading user experience. To this end, in this thesis, we assume that applications running on multi-core processors are associated with a quality-of-service (QoS) target in terms of performance constraints. LÄS MER