Sökning: "Kaxiras Stefanos"

Visar resultat 1 - 5 av 7 avhandlingar innehållade orden Kaxiras Stefanos.

1. 1. Rethinking Dynamic Instruction Scheduling and Retirement for Efficient Microarchitectures

   Författare :Mehdi Alipour; David Black-Schaffer; Stefanos Kaxiras; Mikko H. Lipasti; Uppsala universitet; []
   Nyckelord :NATURVETENSKAP; NATURAL SCIENCES; Out-of-Order Processors; Energy-Efficient; High-Performance; Instruction Scheduling; Computer Science; Datavetenskap;

   Sammanfattning : Out-of-order execution is one of the main micro-architectural techniques used to improve the performance of both single- and multi-threaded processors. The application of such a processor varies from mobile devices to server computers. LÄS MER

3. 2. Leveraging Existing Microarchitectural Structures to Improve First-Level Caching Efficiency

   Författare :Ricardo Alves; David Black-Schaffer; Stefanos Kaxiras; Mattan Erez; Uppsala universitet; []
   Nyckelord :NATURVETENSKAP; NATURAL SCIENCES; Energy Efficient Caching; Memory Architecture; Single Thread Performance; First-Level Caching; Out-of-Order Pipelines; Instruction Scheduling; Filter-Cache; Way-Prediction; Value-Prediction; Register-Sharing.;

   Sammanfattning : Low-latency data access is essential for performance. To achieve this, processors use fast first-level caches combined with out-of-order execution, to decrease and hide memory access latency respectively. LÄS MER

4. 3. Advances Towards Data-Race-Free Cache Coherence Through Data Classification

   Författare :Mahdad Davari; Kaxiras Stefanos; Erik Hagersten; Alberto Ros; Manuel Eugenio Acacio Sánchez; Uppsala universitet; []
   Nyckelord :TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; Shared Memory Architectures; Multicore; Memory Hierarchy; Cache Coherence; Data Classification;

   Sammanfattning : Providing a consistent view of the shared memory based on precise and well-defined semantics—memory consistency model—has been an enabling factor in the widespread acceptance and commercial success of shared-memory architectures. Moreover, cache coherence protocols have been employed by the hardware to remove from the programmers the burden of dealing with the memory inconsistency that emerges in the presence of the private caches. LÄS MER

5. 4. Efficient Execution Paradigms for Parallel Heterogeneous Architectures

   Författare :Konstantinos Koukos; Stefanos Kaxiras; Margaret Martonosi; Uppsala universitet; []
   Nyckelord :TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; Decoupled Execution; Performance; Energy; DVFS; Compiler Optimizations; Heterogeneous Coherence; Computer Science; Datavetenskap;

   Sammanfattning : This thesis proposes novel, efficient execution-paradigms for parallel heterogeneous architectures. The end of Dennard scaling is threatening the effectiveness of DVFS in future nodes; therefore, new execution paradigms are required to exploit the non-linear relationship between performance and energy efficiency of memory-bound application-regions. LÄS MER

7. 5. Rethinking Speculative Execution from a Security Perspective

   Författare :Christos Sakalis; Magnus Själander; Alexandra Jimborean; Stefanos Kaxiras; Josep Torrellas; Uppsala universitet; []
   Nyckelord :NATURVETENSKAP; NATURAL SCIENCES; NATURVETENSKAP; NATURAL SCIENCES; computer architecture; speculative execution; processor; security; out-of-order execution; side-channel; microarchitectural replay; microarchitecture; Delay-on-Miss; Ghosts; Delay-on-Squash; Computer Science; Datavetenskap;

   Sammanfattning : Speculative out-of-order execution is one of the fundamental building blocks of modern, high-performance processors. To maximize the utilization of the system's resources, hardware and software security checks in the speculative domain can be temporarily ignored, without affecting the correctness of the application, as long as no architectural changes are made before transitioning to the non-speculative domain. LÄS MER