Sökning: "Instruction Scheduling"

Visar resultat 6 - 10 av 20 avhandlingar innehållade orden Instruction Scheduling.

1. 6. Integrated Register Allocation and Instruction Scheduling with Constraint Programming

   Författare :Roberto Castañeda Lozano; Christian Schulte; Mats Carlsson; Ingo Sander; Peter van Beek; KTH; []
   Nyckelord :NATURVETENSKAP; NATURAL SCIENCES; NATURVETENSKAP; NATURAL SCIENCES; Computer Science; Datalogi;

   Sammanfattning : This dissertation proposes a combinatorial model, program representations, and constraint solving techniques for integrated register allocation and instruction scheduling in compiler back-ends. In contrast to traditional compilers based on heuristics, the proposed approach generates potentially optimal code by considering all trade-offs between interdependent decisions as a single optimization problem. LÄS MER

3. 7. Locality-aware Scheduling and Characterization of Task-based Programs

   Författare :Ananya Muddukrishna; Mats Brorsson; Christoph Kessler; KTH; []
   Nyckelord :TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; Locality-aware; Task scheduling; OpenMP; Informations- och kommunikationsteknik; Information and Communication Technology;

   Sammanfattning : Modern computer architectures expose an increasing number of parallel features supported by complex memory access and communication structures. Currently used task scheduling techniques perform poorly since they focus solely on balancing computation load across parallel features and remain oblivious to locality properties of support structures. LÄS MER

4. 8. Leveraging Existing Microarchitectural Structures to Improve First-Level Caching Efficiency

   Författare :Ricardo Alves; David Black-Schaffer; Stefanos Kaxiras; Mattan Erez; Uppsala universitet; []
   Nyckelord :NATURVETENSKAP; NATURAL SCIENCES; Energy Efficient Caching; Memory Architecture; Single Thread Performance; First-Level Caching; Out-of-Order Pipelines; Instruction Scheduling; Filter-Cache; Way-Prediction; Value-Prediction; Register-Sharing.;

   Sammanfattning : Low-latency data access is essential for performance. To achieve this, processors use fast first-level caches combined with out-of-order execution, to decrease and hide memory access latency respectively. LÄS MER

5. 9. Exploiting Fine-grain Parallelism in Concurrent Constraint Languages

   Författare :Johan Montelius; RISE; []
   Nyckelord :NATURVETENSKAP; NATURAL SCIENCES; Implicit parallelism; Concurrent Constraint Programming; Cache performance; Logic programming; Abstract machine; Parallel execution; Scheduling; Multiprocessor; Shared memory;

   Sammanfattning : This dissertation presents the design, implementation, and evaluation of a system that exploits fine-grain implicit parallelism in concurrent constraint programming language. The system is able to outperform a C implementation of an algorithm with complex dependencies without any user annotations. LÄS MER

7. 10. Finding and Exploiting Memory-Level-Parallelism in Constrained Speculative Architectures

   Författare :Kim-Anh Tran; Alexandra Jimborean; Stefanos Kaxiras; Louis-Noël Pouchet; Uppsala universitet; []
   Nyckelord :NATURVETENSKAP; NATURAL SCIENCES; Memory-level-parallelism; Energy-efficiency; Performance; Compiler; Instruction Scheduling; SW HW Co-Design; Computer Science; Datavetenskap;

   Sammanfattning : One of the main performance bottlenecks of processors today is the discrepancy between processor and memory speed, known as the memory wall. While the processor executes instructions at a high pace, the memory is too slow to provide data in a timely manner. LÄS MER