Sökning: "III-V nanowires"
Visar resultat 1 - 5 av 84 avhandlingar innehållade orden III-V nanowires.
1. III-V Devices for Emerging Electronic Applications
Sammanfattning : Today’s digitalized society relies on the advancement of silicon (Si) Complementary Metal Oxide Semiconductor (CMOS) technology, but the limitations of down-scaling and the rapidly increasing demand for added functionality that is not easily achieved in Si, have pushed efforts to monolithically 3D-integrate III-V devices above the Si-CMOS technology. In addition, the demand for increased computational power and handling of vast amounts of data is rapidly increasing. LÄS MER
2. III-V Nanowires for High-Speed Electronics
Sammanfattning : III-V compound materials have long been used in RF applications in high-electron-mobility-transistors (HEMTs) and bipolar-junction-transistors (BJTs). Now, III-V is also being viewed as a material candidate for replacing silicon in the n-channel in CMOS processes for increased drive currents and reduced power consumption in future nodes. LÄS MER
3. Vertical III-V Nanowire MOSFETs
Sammanfattning : Vertical III-V nanowire MOSFETs are interesting candidates for future digital and analog applications. High electron velocity III-V materials allow fabrication of low power and high frequency MOSFETs. Vertical vapor-liquid-solid growth enables fabrication of axial and radial heterostructure nanowires. LÄS MER
4. Transmission Electron Microscopy of III-V Nanowires and Nanotrees
Sammanfattning : In this work, the morphology and crystal structure of epitaxial semiconductor nanowire structures grown by metal-organic vapour phase epitaxy (MOVPE) are studied by electron microscopy methods. In particular, the three-dimensional structure of nanowires and nanotrees has been characterised by scanning electron microscopy (SEM), high-resolution transmission electron microscopy (HRTEM) and multi-slice (MS) simulations. LÄS MER
5. Vertical Heterostructure III-V MOSFETs for CMOS, RF and Memory Applications
Sammanfattning : This thesis focuses mainly on the co-integration of vertical nanowiren-type InAs and p-type GaSb MOSFETs on Si (Paper I & II), whereMOVPE grown vertical InAs-GaSb heterostructure nanowires areused for realizing monolithically integrated and co-processed all-III-V CMOS.Utilizing a bottom-up approach based on MOVPE grown nanowires enablesdesign flexibilities, such as in-situ doping and heterostructure formation,which serves to reduce the amount of mask steps during fabrication. LÄS MER