Epitaxial III-V/Si heterojunctions for photonic devices

Sammanfattning: Monolithic integration of III-V materials on silicon is of great interest for efficient electronic-photonic integrated devices and multijunction solar cells on silicon. However, defect formation in the heteroepitaxial layers due to lattice mismatch, thermal mismatch, and polarity mismatch makes it a great challenge. In this work, high quality III/V epitaxial layers are realised on Si by epitaxial lateral overgrowth (ELOG) and corrugated epitaxial lateral overgrowth (CELOG) techniques using a hydride vapour phase epitaxy (HVPE) reactor. We demonstrate electroluminescence of multi quantum well structure grown on InP/Si by ELOG and photodiode behaviour of CELOG n-InP/p-Si. Extensive characterization of CELOG InP/Si and CELOG GaxIn1-xP/Si is also the main subject of this thesis. This includes X-ray diffraction, (time resolved) photoluminescence, Raman spectroscopy, cathodoluminescence and scanning and transmission electron microscopies.A wafer-scale InP layer is obtained on a 3” Si wafer via ELOG. The ELOG InP/Si is then used as a substrate to fabricate a multi quantum well LED emitting at 1530 nm. Although the MQWs were grown on InP covering ELOG InP layer and InP layer on the defective seed, rather strong luminescence is observed from the electrically injected MQW on InP/Si. We identify that unsatisfactory surface morphology after MQW growth as the main factor yielding broad emission without leading to stimulated emission. However transparency condition measurements reveal that there is gain in the material indicating the potential of this technique for fabricating lasers on silicon. We need to address also the warping of ELOG/Si due to thermal strain in the device processing.CELOG of InP/Si revealed a highly crystalline InP layer on Si with an abrupt interface free of dislocations despite an 8% lattice mismatch. That misfit dislocations are confined to the interface and do not lead to threading dislocations in the layer is characteristic of the wafer bonded interface. We find the same behaviour in our CELOG InP/Si suggesting that our method acts as epitaxial wafer bonding at growth temperatures. As a proof of concept demonstration, an n-InP/p-Si heterojunction photodiode has been fabricated by CELOG technique with an open circuit voltage of 180 mV, a short circuit current density of 1.89 mA/cm2, internal quantum efficiency of 6% and external quantum efficiency of 4%. Despite low performance, this demonstrates the potential of CELOG method for III-V/Si for solar cell application.The CELOG technique is also used to demonstrate a dislocation free GaxIn1-xP/Si interface. As a pre-study GaInP growth optimization was done on ELOG patterns on GaAs substrate. CELOG GaxIn1-xP/Si exhibits orientation dependent growth and composition anisotropy. Stacking faults are observed in the CELOG GaxIn1-xP/Si interface region but no threading dislocations were observed in the interface. An atomic disorder layer of ~1nm thickness is present at the interface. The CELOG GaxIn1-xP layers are fully relaxed and no strain is observed despite a ~4% lattice mismatch.We conclude that there is room for improvement with ELOG and CELOG processes to obtain device quality III-V layers on Si. We have demonstrated that the CELOG technique is a generic technology that can be extended to realize high quality heterojunctions with mismatched material systems. Thus optimized ELOG and CELOG techniques can facilitate monolithic integration of III-V on Si for silicon photonics and high-efficiency low-cost multijunction solar cells.