Electrothermal Simulation in a Concurrent Waveform Relaxation Based Circuit Simulator
Sammanfattning: The main purpose of this work is to study methods to simulate electro-thermal effects in integrated circuits using CONCISE a waveform relaxation based circuit simulator. WR is a method that is suitable to run on a multi-computer with state of the art computing power. Especially CMOS VLSI circuits have been simulated successfully with WR. With simulation experiments we have shown that it is possible to use WR methods to simulate the electro-thermal couplings that are present in integrated circuits. The approach we have used for modeling the electro-thermal couplings is general and can be used in standard circuit simulators, such as SPICE. One contribution is the augmented transistor modeling approach. The idea is to have an augmented transistor model that adds thermal behavior to the built-in transistor model. This is especially useful in the design of electronic circuits when we consider dynamic thermal effects using existing transistor models which typically only consider the temperature as a constant parameter. The augmented transistor model enables the user to model both the thermal network and its dynamic couplings to the electrical network. Principles of thermal network modeling are also presented to help the reader understand the couplings between the electrical and the thermal domains. Physical thermal relations are transformed into electrical analogies suitable for simulation by a circuit simulator. The result is an approach intended for modeling of multidimensional thermal networks. For the synthesis of compact models of the multidimensional thermal network we have found it practical to use bond graphs to illustrate the derivation steps. Another purpose of this work is to simplify the task of writing functional models in CONCISE; our in-house circuit simulator. The proposed method of incorporating functional elements into a bond graph relies on an analogy between the numerical solver and the circuit primitive norator. We have extended the bond graph language with nullator and norator elements, which are frequently used in circuit theory. With these new bond graph primitives we have shown that it is possible to start with a design equation and synthesize an electrical circuit. We have specifically investigated the synthesis of a translinear circuit.
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