Growth, processing and characterization of group IV materials for thermoelectric applications
Sammanfattning: Discover of new energy sources and solutions are one of the important global issues nowadays, which has a big impact on economy as well as environment. One of the methods to help to mitigate this issue is to recover wasted heat, which is produced in large quantities by the industry, through vehicle exhausts and in many other situations where we consume energy. One way to do this would be using thermoelectric (TE) materials, which enable direct interconversion between heat and electrical energy. This thesis investigates how the novel material combinations and nanotechnology could be used for fabricating more efficient TE materials and devices.The work presents synthesis, processing, and electrical characterization of group IV materials for TE applications. The starting point is epitaxial growth of alloys of group IV elements, silicon (Si), germanium (Ge) and tin (Sn), with a focus on SiGe and GeSn(Si) alloys. The material development is performed using chemical vapor deposition (CVD) technique. Strained and strain-relaxed Ge1-x Snx (0.01≤x≤0.15) has been successfully grown on Ge buffer and Si substrate, respectively. It is demonstrated that a precise control of temperature, growth rate, Sn flow and buffer layer quality is necessary to overcome Sn segregation and achieve a high quality GeSn layer. The incorporation of Si and n- and p-type dopant atoms is also investigated and it was found that the strain can be compensated in the presence of Si and dopant atoms. Si1-xGex layers are grown on Si-on-insulator wafers and condensed by oxidation at 1050 ᵒC to manufacture SiGe-on-insulator (SGOI) wafers. SGOI wafers are n- or p-doped by diffusion of phosphorous (P), or boron (B) atoms into the SGOI wafers. Nanowires (NWs) are processed, either by sidewall transfer lithography (STL), or by using conventional lithography, and subsequently manufactured into nanoscale dimensions by focused ion beam (FIB) technique. The NWs are formed in an array, where one side is heated by a resistive heater made of Ti/Pt. The high contact resistance for NWs is tackled by the formation of a Ni silicide layer prior to the metallization. A very low contact resistivity for Ni-SiGe and Ni-GeSn phase is achieved at 450 ᵒC, using rapid thermal processing (RTP). The power factor of NWs is measured and the results are compared for NWs manufactured by different methods. It is found that the electrical properties of NWs fabricated with FIB technique can be influenced due to Ga doping during ion milling.Finally, the carrier transport in SiGe NWs formed on SGOI samples is tailored by applying a back-gate voltage on the Si substrate. In this way, the power factor is improved by a factor of 4. This improvement is related to the presence of defects and/or small fluctuation of nanowire shape and Ge content along the NWs, generated during processing and condensation of SiGe layers. The SiGe results open a new window for operation of SiGe NWs-based TE devices in the new temperature range of 250 to 450 K.
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