Custom Datapaths for DSP ASICs Methodology and Implementation

Sammanfattning: This thesis regards datapath design and analysis at several abstraction levels. Five papers are presented that focus on datapath design for mobile communication systems and design methodologies for such datapaths. Paper I discusses different aspects of Turbo channel decoder design for high speed and low power applications. It is shown that critical path delay is significantly reduced by simple rescheduling operations. A new topology is presented for UMTS interleavers that achieves significantly higher throughput with lower power consumption and smaller area. In paper II, a datapath design methodology based on a fast handshaking protocol is presented. The methodology is implemented with a small set of flexible and lean modules that compared to standard handshaking protocols have both smaller delay and lower implementation cost for pipelined datapath designs. In paper III software domain abstraction paradigms are applied to the design of a hardware datapath library in C++. Several methodologies in the software domain are shown to aid the design process. Two of the more important are design for interfaces and design with design patterns. It is shown that reliability and usability are improved by the application of software paradigms. Papers IV and V deal with the design of broadband interpolating and decimating channel filters for low power applications. All filters are of the lattice wave digital filter type, which is suitable for parallelization and has good filtering properties. Several architectural modifications are described to increase the parallelism and achieve lower clock frequency and supply voltage.