Electrical Characterization of III-V Nanostructure

Sammanfattning: This thesis investigates the electronic properties of a number of novel III-V materials and material combinations for transistor applications. In particular, high-κ/InAs metal-oxide-semiconductor (MOS) structures and transport properties of GaSb nanowires have been studied. III-V semiconductors are potential candidates to replace Si-based electronics due to their outstanding electron transport properties. One of the main challenges in the performance of III-V MOS Field-Effect Transistors (MOSFETs) is the integration of high quality high-κ gate oxides. The quality of the oxide and the oxide-semiconductor interface affects the density of trapped charges which subsequently affects the device performance. The first part of the thesis is focused on studying the electrical properties of high-κ/InAs material system. A theoretical model of MOS capacitance-voltage (C-V) response is developed for narrow band gap semiconductors to quantify the densities of InAs-oxide interface and border traps. Different deposition conditions and surface passivation techniques are examined to minimize the trap densities. The optimized structure shows trap densities in the order of 1012 cm-2eV-1, which is comparable to the state-of-the-art high-κ on other high-electron-mobility III-Vs, such as InGaAs. The second part of the thesis discusses the transport properties of GaSb nanowires. The electrical properties of the nanowires are characterized by fabricating lateral nanowire-based Field-Effect transistors. The thesis further explores a strategy for boosting the mobility in GaSb nanowires using strained GaSb/InGaAs core-shell nanowires.