All Digital Polar Transmitter Design for Software Defined Radio : Architecture and Low Power Circuit Implementation

Detta är en avhandling från Stockholm : KTH Royal Institute of Technology

Sammanfattning: The evolving wireless communication technology is aiming highdata rate, high mobility, long distance and at the meantime, co-existwith various different standards. This developing trend requires ahighly linear transceiver system and it causes the problem of lowefficiency due to the large crest factor of signals. On the other hand,with process scaling, digital blocks are occupying more functions andchip area than before, to fully utilize the digital process low poweradvantage and save design cost, hardware reuse is preferable. Theconcept of Software Defined Radio (SDR) is raised to make thesystem more adaptable to multiple communication standards withminimal hardware resources.In this doctoral dissertation work, the software defined radioarchitecture especially the all-digital polar transmitter architecture isexplored. System level comparison on different transmitter topologiesis carried out in the first place. Direct conversion, out-phasing andpolar transmitter topologies are compared. Based on the system levelevaluation, a Lowpass Sigma Delta Modulation (LPSDM) digitalpolar transmitter is designed under 90nm CMOS process andpackaged in QFN32. 19.3% peak efficiency and 11.4dBm outputpower is measured under single 1.0V supply. The constellationmeasurement achieved 5.08% for 3pi/8PSK modulation and 7.01%for QAM16 modulation output. The measurement on the packagedtransmitter AM/AM and AM/PM also demonstrated the linearity andpower efficiency performance under low voltage environment. This verified the possibility for a fully SDR solution in the future.As a specific application and genuine creation, the UHF RFIDstandard is mapped into digital polar transmitter architecture. System level simulation is performed and transient signal parameters areextracted. To prove the SDR possibility, the system is fully designedby VHDL language and downloaded into FPGA hardware with highspeed serial port. The measured results confirm the possibility of thedigital polar transmitter architecture potential in SDR systemrealization.Based on the design and verification of two different systems, themethodology for digital implementation of linear transmitter systemis developed and the skill to carry out optimization and measurementis also possessed. In conclusion, the academic publication andverification proved the feasibility of digital polar transmitterapplication in linear system and point out the direction for a fullySDR realization.

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