Sökning: "interconnect modelling"

Hittade 4 avhandlingar innehållade orden interconnect modelling.

  1. 1. Modelling and Analysis of Interconnects for Deep Submicron Systems-on-Chip

    Författare :Dinesh Pamunuwa; KTH; []
    Nyckelord :delay and noise modelling in VLSI circuits; cross-talk; interconnect modelling; timing analysis; transfer function; on-chip bus; bandwidth maximization; throughput maximization; repeater insertion; wire optimization;

    Sammanfattning : The last few decades have been a very exciting period in thedevelopment of micro-electronics and brought us to the brink ofimplementing entire systems on a single chip, on a hithertounimagined scale. However an unforeseen challenge has croppedup in the form of managing wires, which have become the mainbottleneck in performance, masking the blinding speed of activedevices. LÄS MER

  3. 2. Modelling and Reliability Assessment of Microsystem Interconnections

    Författare :Yan Zhang; Chalmers tekniska högskola; []
    Nyckelord :TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; cohesive zone model; discontinuous regularization; Micropolar theory; homogenization; microsystem interconnection;

    Sammanfattning : With the continuous increase of packaging density, the electronic component size and, in particular, the thickness of the involved interconnections decrease significantly. In addition, the microsystem interconnects usually include even finer internal structures. LÄS MER

  4. 3. III-V Nanowire MOSFET High-Frequency Technology Platform

    Författare :Stefan Andric; Nanoelektronik; []
    Nyckelord :TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; MOSFET; III-V; nanowire NW ; Technology library; Process Monitor Structures; Radio Frequency; millimeter wave mmWave ; Compact Modelling; Circuit Design; Matching Networks; Low Noise Amplifier;

    Sammanfattning : This thesis addresses the main challenges in using III-V nanowireMOSFETs for high-frequency applications by building a III-Vvertical nanowire MOSFET technology library. The initial devicelayout is designed, based on the assessment of the current III-V verticalnanowire MOSFET with state-of-the-art performance. LÄS MER

  5. 4. System Interconnection Design Trade-offs in Three-Dimensional (3-D) Integrated Circuits

    Författare :Roshan Weerasekera; Hannu Tenhunen; Li-Rong Zheng; Atila Alvandpour; KTH; []
    Nyckelord :NATURVETENSKAP; NATURAL SCIENCES; Interconnects; Parasitic Extraction; Repeaters; Signal Integrity; System-on-Chip SoP ; System-in-Package SiP ; System-on-Package SoP ; Three-dimensional 3-D Integration; Through-Silicon-Via TSV ; Vertical Integration; Information technology; Informationsteknik;

    Sammanfattning : Continued technology scaling together with the integration of disparate technologies in a single chip means that device performance continues to outstrip interconnect and packaging capabilities, and hence there exist many difficult engineering challenges, most notably in power management, noise isolation, and intra and inter-chip communication. Significant research effort spanning many decades has been expended on traditional VLSI integration technologies, encompassing process, circuit and architectural issues to tackle these problems. LÄS MER