Sökning: "System on Chip SoC"

Visar resultat 1 - 5 av 41 avhandlingar innehållade orden System on Chip SoC.

  1. 1. Design and Analysis of On-Chip Communication for Network-on-Chip Platforms

    Författare :Zhonghai Lu; Axel Jantsch; Kees Goossens; KTH; []
    Nyckelord :TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; On-Chip Communication; Network-on-Chip; System-on-Chip; Electronics; Elektronik;

    Sammanfattning : Due to the interplay between increasing chip capacity and complex applications, System-on-Chip (SoC) development is confronted by severe challenges, such as managing deep submicron effects, scaling communication architectures and bridging the productivity gap. Network-on-Chip (NoC) has been a rapidly developed concept in recent years to tackle the crisis with focus on network-based communication. LÄS MER

  2. 2. System-on-Chip Test Scheduling and Test Infrastructure Design

    Författare :Anders Larsson; Petru Eles; Zebo Peng; Linköpings universitet; []
    Nyckelord :NATURVETENSKAP; NATURAL SCIENCES; system-on-chip; core-based systems; test infrastructure; test scheduling; broadcasting; test set sharing; Computer science; Datavetenskap;

    Sammanfattning : There are several challenges that have to be considered in order to reduce the cost of System-on-Chip (SoC) testing, such as test application time, chip area overhead due to hardware introduced to enhance the testing, and the price of the test equipment. In this thesis the test application time and the test infrastructure hardware overhead of multiple-core SoCs are considered and two different problems are addressed. LÄS MER

  3. 3. Silicon nanowire based devices for More than Moore Applications

    Författare :Ganesh Jayakumar; Per-Erik Hellström; Mikael Östling; Luca Selmi; KTH; []
    Nyckelord :silicon nanowire; biosensor; CMOS; sequential integration; lab-on-chip; LOC; high-K; high-K integration on SiNW biosensor; ALD; fluid gate; back gate; SiNW; SiNW pixel matrix; FEOL; pattern transfer lithography; sidewall transfer lithography; STL; multi-target bio detection; BEOL; nanonets; silicon nanonets; SiNN-FET; SiNW-FET; CMOS integration of nanowires; CMOS integration of nanonets; monolithic 3D integration of nanowires; above-IC integration of nanowires; DNA detection using SiNW; SiNW biosensor; dry environment DNA detection; DNA hybridization detection using SiNW; SiNW functionalization; SiNW silanization; SiNW grafting; FEOL integration of SiNW; BEOL integration of SiNW; sequential multiplexed biodetection; biodetection efficiency of SiNW; front end of line integration of SiNW; back end of line integration of SiNW; SiNW dry environment functionalization; APTES cross-linker; accessing SiNW test site; fluorescence microscopy of SiNW; geometry of SiNW; SiNW biosensor variability; top-down fabrication of SiNW; bottom-up fabrication of SiNW; VLS method; ams foundry CMOS process; adding functionality in BEOL process; sensor integration in BEOL process; hafnium oxide; HfO2; aluminium oxide; Al2O3; TiN backgate; Nickel source drain; ISFET; ion sensitive field effect transistor; Overcoming Nernst limit of detection using SiNW; SiNW sub-threshold region operation; ASIC; SOC; SiGe selective epitaxy; epitaxial growth of SiNW; epitaxial growth of nanowires; epitaxial growth of nanonets; nickel silicide contacts; salicide process; high yield SiNW fabrication; high volume SiNW fabrication; silicon ribbon; SiRi pixel; SiRi biosensor; SiRi DNA detection; monolithic 3D integration of nanonets; above-IC integration of nanonets; impact of back gate voltage on silicon nanowire; impact of back gate voltage on SiNW; FDSOI; fully depleted silicon on insulator technology; metal backgate; wafer scale integration of SiNW; wafer scale integration of nanonets; impact of backgate voltage on CMOS inverter circuit; frequency divider; D flip-flop; Informations- och kommunikationsteknik; Information and Communication Technology;

    Sammanfattning : Silicon nanowires (SiNW) are in the spotlight for a few years in the research community as a good candidate for biosensing applications. This is attributed to their small dimensions in nanometer scale that offers high sensitivity, label-free detection and at the same time utilizing small amount of sample. LÄS MER

  4. 4. Test Optimization for Core-based System-on-Chip

    Författare :Anders Larsson; Erik Larsson; Zebo Peng; Petru Ion Eles; Nicola Nicolici; Linköpings universitet; []
    Nyckelord :NATURVETENSKAP; NATURAL SCIENCES; Computer science; Datavetenskap;

    Sammanfattning : The semiconductor technology has enabled the fabrication of integrated circuits (ICs), which may include billions of transistors and can contain all necessary electronic circuitry for a complete system, so-called System-on-Chip (SOC). In order to handle design complexity and to meet short time-to-market requirements, it is increasingly common to make use of a modular design approach where an SOC is composed of pre-designed and pre-verified blocks of logic, called cores. LÄS MER

  5. 5. Deadlock Free Routing in Mesh Networks on Chip with Regions

    Författare :Rickard Holsmark; Shashi Kumar; Petru Eles; Axel Jantsch; Jönköping University; []
    Nyckelord :NATURVETENSKAP; NATURAL SCIENCES; Networks on Chip; Mesh Topology; Routing Algorithms; Wormhole Switching; Deadlock; Application Specific Routing; Systems engineering; Systemteknik; TECHNOLOGY;

    Sammanfattning : There is a seemingly endless miniaturization of electronic components, which has enabled designers to build sophisticated computing structureson silicon chips. Consequently, electronic systems are continuously improving with new and more advanced functionalities. LÄS MER